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pin configurations appear at end of data sheet. general description the max7301 compact, serial-interfaced i/o expander (or general-purpose i/o (gpio) peripheral) provides microprocessors with up to 28 ports. each port is individu - ally user configurable to either a logic input or logic output. each port can be configured either as a push-pull logic output capable of sinking 10ma and sourcing 4.5ma, or a schmitt logic input with optional internal pullup. seven ports feature configurable transition detection logic, which generates an interrupt upon change of port logic level. the max7301 is controlled through an spi-compatible 4-wire serial interface. the MAX7301AAX and max7301atl have 28 ports and are available in 36-pin ssop and 40-pin tqfn packages, respectively. the max7301aai has 20 ports and is avail - able in a 28-pin ssop package. for a 2-wire i 2 c-interfaced version, refer to the max7300 data sheet. for a pin-compatible port expander with additional 24ma constant-current led drive capability, refer to the max6957 data sheet. applications white goods gaming machines industrial controllers system monitoring benefts and features industry-standard 4-wire interface simplifies expansion of i/o ports to up to 28 i/os independent of microprocessor architecture ? high-speed, 26mhz, spi-/qspi?-/microwire ? - compatible serial interface ? 2.25v to 5.5v operation ? 20 or 28 i/o ports confgurable as push-pull logic output, schmitt logic input or schmitt logic input with internal pullup ? logic transition detection for seven i/o ports low power consumption reduces power-supply requirements ? 11a (max) shutdown current +denotes a lead(pb)-free/rohs-compliant package. *ep = exposed pad. qspi is a trademark of motorola, inc. microwire is a registered trademark of national semiconductor corp. part temp range pin- package max7301aai+ -40 c to +125 c 28 ssop MAX7301AAX+ -40 c to +125 c 36 ssop max7301atl+ -40 c to +125 c 40 tqfn-ep* p5 p4 p7 p8 p6 p10 p9 p12 p13 p11 p15 p14 p17 p18 p16 p20 p19 p22 p23 p21 36 2 3 33 4 34 35 29 27 31 24 25 22 21 23 v+ gnd gnd sclk din dout p30 p29 p31 p27 p28 p25 p24 p26 32 30 26 5 7 9 28 6 8 11 10 12 14 15 13 17 16 19 20 18 cs max7301 3v ssop chip select data in clock in data out i/o 4 i/o 5 i/o 6 i/o 7 i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 47nf 1 iset 39k? 19-2438; rev 8; 4/15 typical operating circuit ordering information max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
(voltage with respect to gnd.) v+ ............................................................................ -0.3v to +6v all other pins .............................................. -0.3v to (v+ + 0.3v) p4Cp31 current ............................................................... 30ma gnd current .................................................................... 800ma continuous power dissipation (t a = +70c) 28-pin ssop (derate 9.5mw/c above +70c) .......... 762mw 36-pin ssop (derate 11.8mw/c above +70c) ........ 941mw 40-pin tqfn (derate 26.3mw/c above +70c) ... 2963.0mw operating temperature range (t min , t max ) ................................................ -40c to +125c junction temperature ...................................................... +150c storage temperature range ............................ -65c to +150c lead temperature (soldering, 10s) ................................. +300c ( typical operating circuit , v+ = 2.5v to 5.5v, t a = t min to t max , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units operating supply voltage v+ 2.5 5.5 v shutdown supply current i shdn all digital inputs at v+ or gnd t a = +25c 5.5 8 a t a = -40c to +85c 10 t a = t min to t max 11 operating supply current (output high) i gpoh all ports programmed as outputs high, no load, all other inputs at v+ or gnd t a = +25c 180 230 a t a = -40c to +85c 250 t a = t min to t max 270 operating supply current (output low) i gpol all ports programmed as outputs low, no load, all other inputs at v+ or gnd t a = +25c 170 210 a t a = -40c to +85c 230 t a = t min to t max 240 operating supply current (input) i gpi all ports programmed as inputs without pul - lup, ports, and all other inputs at v+ or gnd t a = +25c 110 135 a t a = -40c to +85c 140 t a = t min to t max 145 inputs and outputs logic high input voltage port inputs v ih 0.7 v+ v logic low input voltage port inputs v il 0.3 v+ v input leakage current i ih , i il gpio inputs without pullup, v port = v+ to gnd -100 1 +100 na gpio input internal pullup to v+ i pu v+ = 2.5v 12 19 30 a v+ = 5.5v 80 120 180 hysteresis voltage gpio inputs d v i 0.3 v output high voltage v oh gpio outputs, i source = 2ma, t a = -40c to +85c v+ - 0.7 v gpio outputs, i source = 1ma, t a = t min to t max (note 2) v+ - 0.7 maxim integrated 2 electrical characteristics stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
note 1: all parameters tested at t a = +25c. specifications over temperature are guaranteed by design. note 2: guaranteed by design. (v+ = 2.5v to 5.5v, t a = t min to t max , unless otherwise noted.) (note 1) ( typical operating circuit , v+ = 2.5v to 5.5v, t a = t min to t max , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units clk clock period t cp 38.4 ns clk pulse-width high t ch 19 ns clk pulse-width low t cl 19 ns cs fall to sclk rise setup time t css 9.5 ns clk rise to cs rise hold time t csh 0 ns din setup time t ds 9.5 ns din hold time t dh 0 ns output data propagation delay t do c load = 25pf 21 ns minimum cs pulse high t csw 19 ns parameter symbol conditions min typ max units port sink current i ol v port = 0.6v 2 10 18 ma output short-circuit current i olsc port configured output low, shorted to v+ 2.75 11 20.00 ma input high-voltage sclk, din, cs v ih v+ 3.3v 1.6 v v+ > 3.3v 2 input low-voltage sclk, din, cs v il 0.6 v input leakage current sclk, din, cs i ih , i il -50 +50 na output high-voltage dout v oh i source = 1.6ma v+ - 0.5 v output low-voltage dout v ol i sink = 1.6ma 0.4 v maxim integrated 3 timing characteristics (figure 3) electrical characteristics (continued) www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
(t a = +25c, unless otherwise noted.) gpo short-circuit current vs. temperature max7301 toc07 temperature ( c) port current (ma) 97.5 70.0 42.5 15.0 -12.5 10 100 1 -40.0 125.0 gpo = 0, port shorted to v+ gpo = 1, port shorted to gnd gpi pullup current vs. temperature max7301 toc06 temperature ( c) pullup current (a) 97.5 70.0 42.5 15.0 -12.5 100 1000 10 -40.0 125.0 v+ = 5.5v v+ = 3.3v v+ = 2.5v gpo source current vs. temperature (output = 1) max7301 toc05 temperature ( c) port source current (ma) 97.5 70.0 42.5 15.0 -12.5 3 4 5 6 7 8 9 2 -40.0 125.0 v port = 1.4 v+ = 5.5v v+ = 3.3v v+ = 2.5v gpo sink current vs. temperature (output = 0) max7301 toc04 temperature ( c) port sink current (ma) 97.5 70.0 -12.5 15.0 42.5 4 6 8 10 12 14 16 18 2 -40.0 125.0 v+ = 2.5v to 5.5v, v port = 0.6v operating supply current vs. v+ (outputs unloaded) max7301 toc03 v+ (v) supply currrent (ma) 5.0 4.5 4.0 3.5 3.0 2.5 1.0 0.1 2.0 5.5 all ports output (1) all ports output (0) all ports input (pullups disabled) shutdown supply current vs. temperature max7301 toc02 temperature ( c) supply current (a) 97.5 70.0 42.5 15.0 -12.5 4 5 6 7 8 3 -40.0 125.0 v+ = 5.5v v+ = 3.3v v+ = 2.5v operating supply current vs. temperature max7301 toc01 temperature ( c) supply current (ma) 97.5 70.0 42.5 15.0 -12.5 0.04 0.08 0.12 0.16 0.20 0.24 0.28 0.32 0.36 0.40 0 -40.0 125.0 v+ = 2.5v to 5.5v no load all ports output (1) all ports output (0) all ports input high maxim integrated 4 typical operating characteristics www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
detailed description the max7301 gpio peripheral provides up to 28 i/o ports, p4 to p31, controlled through an spi-compatible serial interface. the ports can be configured to any combination of logic inputs and logic outputs, and default to logic inputs on power-up. figure 1 is the max7301 functional diagram. any i/o port can be configured as a push-pull output (sinking 10ma, sourcing 4.5ma), or a schmitt-trigger logic input. each input has an individually selectable internal pullup resistor. additionally, transition detection allows seven ports (p24 through p30) to be monitored in any maskable combination for changes in their logic status. a detected transition is flagged through an interrupt pin (port p31). the port configuration registers set the 28 ports, p4 to p31, individually as gpio. a pair of bits in registers 0x09 through 0x0f sets each ports configuration (tables 1 and 2). the 36-pin MAX7301AAX and 40-pin max7301atl have 28 ports, p4 to p31. the 28-pin max7301aai is offered in 20 ports, p12 to p31. the eight unused ports should be configured as outputs on power-up by writ- ing 0x55 to registers 0x09 and 0x0a. if this is not done, the eight unused ports remain as floating inputs and quiescent supply current rises, although there is no dam - age to the part. register control of i/o ports across multiple drivers the max7301 offers 20 or 28 i/o ports, depending on package choice. two addressing methods are available. any single port (bit) can be written (set/cleared) at once; or, any sequence of eight ports can be written (set/cleared) in any combination at once. there are no boundaries; it is equally acceptable to write p0 through p7, p1 through p8, or p31 through p38 (p32 through p38 are nonexistent, so the instructions to these bits are ignored). shutdown when the max7301 is in shutdown mode, all ports are forced to inputs (which can be read), and the pullup current sources are turned off. data in the port and control registers remain unaltered so port configuration and output levels are restored when the max7301 is taken out of shutdown. the display driver can still be programmed while in shutdown mode. for minimum supply current in shutdown mode, logic inputs should be at gnd or v+ potential. shutdown mode is exited by setting the s bit in the configuration register (table 6). pin name function 36 ssop 28 ssop tqfn 1 1 36 iset bias current setting. connect iset to gnd through a resistor (r iset ) value of 39k w to 120k w . 2, 3 2, 3 37, 38, 39 gnd ground 4 4 40 dout 4-wire interface serial data output port 5C24 p12Cp31 i/o ports. p12 to p31 can be configured as push-pull outputs, cmos logic inputs, or cmos logic inputs with weak pullup resistor. 5C32 1C10, 12C19, 21C30 p4Cp31 i/o ports. p4 to p31 can be configured as push-pull outputs, cmos logic inputs, or cmos logic inputs with weak pullup resistor. 11, 20, 31 n.c. no connection. not internally connected. 33 25 32 sclk 4-wire interface serial clock input port 34 26 33 din 4-wire interface serial data input port 35 27 34 cs 4-wire interface chip-select input, active-low 36 28 35 v+ positive supply voltage. bypass v+ to gnd with a minimum 0.047f capacitor. ep exposed pad on package underside. connect to gnd. maxim integrated 5 pin description www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
serial interface the max7301 communicates through an spi-compati- ble 4-wire serial interface. the interface has three inputs, clock (sclk), chip select ( cs ), and data in (din), and one output, data out (dout). cs must be low to clock data into or out of the device, and din must be stable when sampled on the rising edge of sclk. dout provides a copy of the bit that was input 15.5 clocks earlier, or upon a query it outputs internal register data, and is stable on the rising edge of sclk. note that the spi protocol expects dout to be high impedance when the max7301 is not being accessed; dout on the max7301 is never high impedance. refer to application note 1879: using maxim spi- compatible display drivers with other spi peripherals for ways to convert dout to tri-state, if required. sclk and din may be used to transmit data to other peripherals, so the max7301 ignores all activity on sclk and din except between the fall and subsequent rise of cs . control and operation using the 4-wire interface controlling the max7301 requires sending a 16-bit word. the first byte, d15 through d8, is the command address (table 3), and the second byte, d7 through d0, is the data byte (table 4 through table 8). connecting multiple max7301s to the 4-wire bus multiple max7301s may be daisy-chained by connect - ing the dout of one device to the din of the next, and driving sclk and cs lines in parallel (figure 3). data at din propagates through the internal shift registers and appears at dout 15.5 clock cycles later, clocked out on the falling edge of sclk. when sending commands to multiple max7301s, all devices are accessed at the same time. an access requires (16 n) clock cycles, where n is the number of max7301s connected together. to update just one device in a daisy-chain, the user can send the no-op command (0x00) to the others. writing device registers the max7301 contains a 16-bit shift register into which din data are clocked on the rising edge of sclk, when cs is low. when cs is high, transitions on sclk have no effect. when cs goes high, the 16 bits in the shift register are parallel loaded into a 16-bit latch. the 16 bits in the latch are then decoded and executed. table 2. port configuration matrix table 1. port configuration map mode function port register (0x20C0x5f) (0xa0C0xdf) pin behavior address code (hex) port configuration bit pair upper lower do not use this setting 0x09 to 0x0f 0 0 output gpio output register bit = 0 active-low logic output 0x09 to 0x0f 0 1 register bit = 1 active-high logic output input gpio input without pullup register bit = input logic level schmitt logic input 0x09 to 0x0f 1 0 input gpio input with pullup schmitt logic input with pullup 0x09 to 0x0f 1 1 register address code (hex) register data d7 d6 d5 d4 d3 d2 d1 d0 port configuration for p7, p6, p5, p4 0x09 p7 p6 p5 p4 port configuration for p11, p10, p9, p8 0x0a p11 p10 p9 p8 port configuration for p15, p14, p13, p12 0x0b p15 p14 p13 p12 port configuration for p19, p18, p17, p16 0x0c p19 p18 p17 p16 port configuration for p23, p22, p21, p20 0x0d p23 p22 p21 p20 port configuration for p27, p26, p25, p24 0x0e p27 p26 p25 p24 port configuration for p31, p30, p29, p28 0x0f p31 p30 p29 p28 maxim integrated 6 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
the max7301 is written to using the following sequence: 1) take sclk low. 2) take c s low. this enables the internal 16-bit shift register. 3) clock 16 bits of data into dind15 first, d0 last observing the setup and hold times (bit d15 is low, indicating a write command). 4) take cs high (either while sclk is still high after clocking in the last data bit, or after taking sclk low). 5) take sclk low (if not already low). figure 4 shows a write operation when 16 bits are transmitted. it is acceptable to clock more than 16 bits into the max7301 between taking cs low and taking cs high again. in this case, only the last 16 bits clocked into the max7301 are retained. reading device registers any register data within the max7301 may be read by sending a logic high to bit d15. the sequence is: 1) take sclk low. 2) take cs low (this enables the internal 16-bit shift register). 3) clock 16 bits of data into dind15 first to d0 last. d15 is high, indicating a read command and bits d14 through d8 containing the address of the reg - ister to be read. bits d7Cd0 contain dummy data, which is discarded. 4) take cs high (either while sclk is still high after clocking in the last data bit, or after taking sclk low), positions d7 through d0 in the shift register are now loaded with the register data addressed by bits d1 through d8. 5) take sclk low (if not already low). 6) issue another read or write command (which can be a no-op), and examine the bit stream at dout; the second 8 bits are the contents of the register addressed by bits d1 through d8 in step 3. figure 1. max7301 functional diagram d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 r/w 8 ce data 8 port registers gpio configuration p4 to p31 gpio data r/w configuration registers port change detector mask register command register decode 8 data byte command byte cs din sclk dout 8 maxim integrated 7 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
initial power-up on initial power-up, all control registers are reset, and the max7301 enters shutdown mode (table 4). transition (port data change) detection port transition detection allows any combination of the seven ports p24Cp30 to be continuously monitored for changes in their logic status (figure 5). a detected change is flagged on port p31, which is used as an active-high interrupt output (int). note that the max7301 does not identify which specific port(s) caused the inter - rupt, but provides an alert that one or more port levels have changed. the mask register contains 7 mask bits that select which of the seven ports, p24Cp30 are to be monitored (table 8). set the appropriate mask bit to enable that port for transition detect. clear the mask bit if transi - tions on that port are to be ignored. transition detection works regardless of whether the port being monitored is set to input or output, but generally it is not particularly useful to enable transition detection for outputs. port p31 must be configured as an output in order to work as the interrupt output int when transition detec - tion is used. port p31 is set as output by writing bit d7 = 0 and bit d6 = 1 to the port configuration register (table 1). to use transition detection, first set up the mask regis - ter and configure port p31 as an output, as described above. then enable transition detection by setting the m bit in the configuration register (table 7). whenever the configuration register is written with the m bit set, the max7301 updates an internal 7-bit snapshot register, which holds the comparison copy of the logic states of ports p24 through p30. the update action occurs regard - less of the previous state of the m bit, so that it is not nec - essary to clear the m bit and then set it again to update the snapshot register. when the configuration register is written with the m bit set, transition detection is enabled and remains enabled until either the configuration register is written with the m bit clear, or a transition is detected. the int output port p31 goes low, if it was not already low. once transition detection is enabled, the max7301 continuously compares the snapshot register against the changing states of p24 through p31. if a change on any of the monitored ports is detected, even for a short time (like a pulse), int output port p31 is latched high. the int output is not cleared if more changes occur or if the data pattern returns to its original snapshot con - dition. the only way to clear int is to access (read or write) the transition detection mask register (table 8). transition detection is a one-shot event. when int has been cleared after responding to a transition event, transition detection is automatically disabled, even though the m bit in the configuration register remains set (unless cleared by the user). reenable transition detection by writing the configuration register with the m bit set, to take a new snapshot of the seven ports p24 to p30. figure 2. 4-wire interface t csh t cl t css t ch t csh cs sclk din dout t ds t dh t do maxim integrated 8 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
external component r iset the max7301 uses an external resistor, r iset , to set internal biasing. use a resistor value of 39k w . applications information low-voltage operation the max7301 operates down to 2v supply voltage (although the sourcing and sinking currents are not guaranteed), providing that the max7301 is powered up initially to at least 2.5v to trigger the devices internal reset, and also that the serial interface is constrained to 10mbps. spi routing considerations the max7301s spi interface is guaranteed to operate at 26mbps on a 2.5v supply, and on a 5v supply typi - cally operates at 50mbps. this means that transmission line issues should be considered when the interface connections are longer than 100mm, particularly with higher supply voltages. ringing manifests itself as com - munication issues, often intermittent, typically due to double clocking due to ringing at the sclk input. fit a 1k w to 10k w parallel termination resistor to either gnd or v+ at the din, sclk, and cs input to damp ringing for moderately long interface runs. use line- impedance matching terminations when making connec - tions between boards. pcb layout considerations for the tqfn version, connect the underside exposed pad to gnd. ensure that all the max7301 gnd con - nections are used. a ground plane is not necessary, but may be useful to reduce supply impedance if the max7301 outputs are to be heavily loaded. keep the track length from the iset pin to the r iset resistor as short as possible, and take the gnd end of the resistor either to the ground plane or directly to the ground pins. power-supply considerations the max7301 operates with power-supply voltages of 2.5v to 5.5v. bypass the power supply to gnd with a 0.047f capacitor as close to the device as possible. add a 1f capacitor if the max7301 is far away from the boards input bulk decoupling capacitor. chip information process: cmos figure 4. transmission of a 16-bit write to the max7301 figure 3. daisy-chain arrangement for controlling multiple max7301s . d15 = 0 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 d15 = 0 cs sclk din dout microcontroller serial-data output serial cs output seria-clock output serial-data input din sclk cs dout din sclk cs dout din sclk cs dout max7301 max7301 max7301 maxim integrated 9 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
table 3. register address map register command address hex code d15 d14 d13 d12 d11 d10 d9 d8 no-op r/ w 0 0 0 0 0 0 0 0x00 configuration r/ w 0 0 0 0 1 0 0 0x04 transition detect mask r/ w 0 0 0 0 1 1 0 0x06 factory reserved. do not write to this. r/ w 0 0 0 0 1 1 1 0x07 port configuration p7, p6, p5, p4 r/ w 0 0 0 1 0 0 1 0x09 port configuration p11, p10, p9, p8 r/ w 0 0 0 1 0 1 0 0x0a port configuration p15, p14, p13, p12 r/ w 0 0 0 1 0 1 1 0x0b port configuration p19, p18, p17, p16 r/ w 0 0 0 1 1 0 0 0x0c port configuration p23, p22, p21, p20 r/ w 0 0 0 1 1 0 1 0x0d port configuration p27, p26, p25, p24 r/ w 0 0 0 1 1 1 0 0x0e port configuration p31, p30, p29, p28 r/ w 0 0 0 1 1 1 1 0x0f port 0 only (virtual port, no action) r/ w 0 1 0 0 0 0 0 0x20 port 1 only (virtual port, no action) r/ w 0 1 0 0 0 0 1 0x21 port 2 only (virtual port, no action) r/ w 0 1 0 0 0 1 0 0x22 port 3 only (virtual port, no action) r/ w 0 1 0 0 0 1 1 0x23 port 4 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 0 1 0 0 0x24 port 5 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 0 1 0 1 0x25 port 6 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 0 1 1 0 0x26 port 7 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 0 1 1 1 0x27 port 8 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 0 0 0 0x28 port 9 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 0 0 1 0x29 port 10 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 0 1 0 0x2a port 11 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 0 1 1 0x2b port 12 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 1 0 0 0x2c port 13 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 1 0 1 0x2d port 14 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 1 1 0 0x2e port 15 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 0 1 1 1 1 0x2f port 16 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 0 0 0 0x30 port 17 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 0 0 1 0x31 port 18 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 0 1 0 0x32 port 19 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 0 1 1 0x33 port 20 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 1 0 0 0x34 port 21 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 1 0 1 0x35 port 22 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 1 1 0 0x36 port 23 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 0 1 1 1 0x37 port 24 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 0 0 0 0x38 port 25 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 0 0 1 0x39 maxim integrated 10 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
note: unused bits read as 0. table 3. register address map (continued) register command address hex code d15 d14 d13 d12 d11 d10 d9 d8 port 26 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 0 1 0 0x3a port 27 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 0 1 1 0x3b port 28 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 1 0 0 0x3c port 29 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 1 0 1 0x3d port 30 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 1 1 0 0x3e port 31 only (data bit d0. d7Cd1 read as 0) r/ w 0 1 1 1 1 1 1 0x3f 4 ports 4C7 (data bits d0Cd3. d4Cd7 read as 0) r/ w 1 0 0 0 0 0 0 0x40 5 ports 4C8 (data bits d0Cd4. d5Cd7 read as 0) r/ w 1 0 0 0 0 0 1 0x41 6 ports 4C9 (data bits d0Cd5. d6Cd7 read as 0) r/ w 1 0 0 0 0 1 0 0x42 7 ports 4C10 (data bits d0Cd6. d7 reads as 0) r/ w 1 0 0 0 0 1 1 0x43 8 ports 4C11 (data bits d0Cd7) r/ w 1 0 0 0 1 0 0 0x44 8 ports 5C12 (data bits d0Cd7) r/ w 1 0 0 0 1 0 1 0x45 8 ports 6C13 (data bits d0Cd7) r/ w 1 0 0 0 1 1 0 0x46 8 ports 7C14 (data bits d0Cd7) r/ w 1 0 0 0 1 1 1 0x47 8 ports 8C15 (data bits d0Cd7) r/ w 1 0 0 1 0 0 0 0x48 8 ports 9C16 (data bits d0Cd7) r/ w 1 0 0 1 0 0 1 0x49 8 ports 10C17 (data bits d0Cd7) r/ w 1 0 0 1 0 1 0 0x4a 8 ports 11C18 (data bits d0Cd7) r/ w 1 0 0 1 0 1 1 0x4b 8 ports 12C19 (data bits d0Cd7) r/ w 1 0 0 1 1 0 0 0x4c 8 ports 13C20 (data bits d0Cd7) r/ w 1 0 0 1 1 0 1 0x4d 8 ports 14C21 (data bits d0Cd7) r/ w 1 0 0 1 1 1 0 0x4e 8 ports 15C22 (data bits d0Cd7) r/ w 1 0 0 1 1 1 1 0x4f 8 ports 16C23 (data bits d0Cd7) r/ w 1 0 1 0 0 0 0 0x50 8 ports 17C24 (data bits d0Cd7) r/ w 1 0 1 0 0 0 1 0x51 8 ports 18C25 (data bits d0Cd7) r/ w 1 0 1 0 0 1 0 0x52 8 ports 19C26 (data bits d0Cd7) r/ w 1 0 1 0 0 1 1 0x53 8 ports 20C27 (data bits d0Cd7) r/ w 1 0 1 0 1 0 0 0x54 8 ports 21C28 (data bits d0Cd7) r/ w 1 0 1 0 1 0 1 0x55 8 ports 22C29 (data bits d0Cd7) r/ w 1 0 1 0 1 1 0 0x56 8 ports 23C30 (data bits d0Cd7) r/ w 1 0 1 0 1 1 1 0x57 8 ports 24C31 (data bits d0Cd7) r/ w 1 0 1 1 0 0 0 0x58 7 ports 25C31 (data bits d0Cd6. d7 reads as 0) r/ w 1 0 1 1 0 0 1 0x59 6 ports 26C31 (data bits d0Cd5. d6Cd7 read as 0) r/ w 1 0 1 1 0 1 0 0x5a 5 ports 27C31 (data bits d0Cd4. d5Cd7 read as 0) r/ w 1 0 1 1 0 1 1 0x5b 4 ports 28C31 (data bits d0Cd3. d4Cd7 read as 0) r/ w 1 0 1 1 1 0 0 0x5c 3 ports 29C31 (data bits d0Cd2. d3Cd7 read as 0) r/ w 1 0 1 1 1 0 1 0x5d 2 ports 30C31 (data bits d0Cd1. d2Cd7 read as 0) r/ w 1 0 1 1 1 1 0 0x5e 1 port 31 only (data bit d0. d1Cd7 read as 0) r/ w 1 0 1 1 1 1 1 0x5f maxim integrated 11 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
figure 5. maskable gpio ports p24 through p31 gpio input conditioning p31 p30 p29 p28 p27 p26 p25 p24 gpio/port output latch gpio input conditioning gpio/port output latch gpio input conditioning gpio/port output latch gpio input conditioning gpio/port output latch gpio input conditioning gpio/port output latch gpio input conditioning gpio/port output latch gpio input conditioning gpio/port output latch d q d q d q d q d q d q d q clock pulse when writing configuration register with m bit set or configuration register m bit = set r s gpio in gpio/port out clock pulse after each read access to mask register mask register bit 6 mask register bit 5 mask register bit 4 mask register bit 3 mask register bit 2 mask register bit 1 mask register lsb gpio in gpio/port out gpio in gpio/port out gpio in gpio/port out gpio in gpio/port out gpio in gpio/port out gpio in gpio/port out gpio in gpio/port out gpio input conditioning gpio/port output latch int output latch maxim integrated 12 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
table 6. shutdown control (s data bit d0) format table 5. configuration register format x = unused bits; if read, zero results. table 4. power-up configuration function address code (hex) register data d7 d6 d5 d4 d3 d2 d1 d0 shutdown 0x04 m 0 x x x x x 0 normal operation 0x04 m 0 x x x x x 1 function address code (hex) register data d7 d6 d5 d4 d3 d2 d1 d0 configuration register 0x04 m 0 x x x x x s register function power-up condition address code (hex) register data d7 d6 d5 d4 d3 d2 d1 d0 port register bits 4 to 31 gpio output low 0x24 to 0x3f x x x x x x x 0 configuration register shutdown enabled transition detection disabled 0x04 0 0 x x x x x 0 input mask register all clear (masked off) 0x06 x 0 0 0 0 0 0 0 port configuration p7, p6, p5, p4: gpio inputs without pullup 0x09 1 0 1 0 1 0 1 0 port configuration p11, p10, p9, p8: gpio inputs without pullup 0x0a 1 0 1 0 1 0 1 0 port configuration p15, p14, p13, p12: gpio inputs without pullup 0x0b 1 0 1 0 1 0 1 0 port configuration p19, p18, p17, p16: gpio inputs without pullup 0x0c 1 0 1 0 1 0 1 0 port configuration p23, p22, p21, p20: gpio inputs without pullup 0x0d 1 0 1 0 1 0 1 0 port configuration p27, p26, p25, p24: gpio inputs without pullup 0x0e 1 0 1 0 1 0 1 0 port configuration p31, p30, p29, p28: gpio inputs without pullup 0x0f 1 0 1 0 1 0 1 0 maxim integrated 13 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
table 8. transition detection mask register table 7. transition detection control (m data bit d7) format function register address (hex) read/ write register data d7 d6 d5 d4 d3 d2 d1 d0 mask register 0x06 read 0 port 30 mask port 29 mask port 28 mask port 27 mask port 26 mask port 25 mask port 24 mask write unchanged function address code (hex) register data d7 d6 d5 d4 d3 d2 d1 d0 disabled 0x04 0 0 x x x x x s enabled 0x04 1 0 x x x x x s maxim integrated 14 www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
top view 36 35 34 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v+ cs din sclk p4 p31 p26 p5 p30 p6 p29 p7 p28 p27 p17 p16 p15 p11 p14 p10 p13 p9 p12 p8 dout gnd gnd iset 36 ssop max7301 22 21 20 19 15 16 17 18 p22 p25 p24 p23 p21 p20 p19 p18 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v+ cs din sclk p31 p30 p22 p29 p28 p27 p26 p25 p24 p23 p21 p20 p19 p18 p17 p16 p15 p14 p13 p12 dout gnd gnd iset 28 ssop max7301 + + + n.c. p25 p23 p22 p19 p18 n.c. p21 p20 p24 p4 p31 p30 p6 p28 p27 p26 p29 p7 p5 din cs v+ iset gnd gnd gnd dout 1 2 3 4 5 6 7 8 9 10 30 29 28 27 26 25 24 23 22 21 sclk n.c. p9 p13 p10 p14 p11 p15 p16 p17 p12 p8 31 32 33 34 35 36 37 38 39 40 20 19 18 17 16 15 14 13 12 11 tqfn max7301 maxim integrated 15 pin confgurations www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
package type package code document no. land pattern no. 28 ssop a28+1 21-0056 90-0095 36 ssop a36+4 21-0040 90-0098 40 tqfn-ep t4066+5 21-0141 90-0055 maxim integrated 16 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. www.maximintegrated.com max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander
revision number revision date description pages changed 0 4/02 initial release 1 10/02 updated general description , detailed description , initial power-up section, table 3 and table 8 1, 5, 7, 8, 11, 14, 15 2 2/03 corrected input leakage current 2 3 11/03 updated table 2, table 3, figure 5, serial interface , reading device registers , transition (port data change) detection sections. added spi routing configuration and pcb layout considerations sections. added the 36 ssop package outline 1, 5C12, 17 4 5/04 various corrections to data sheet 5, 9, 15, 16 5 2/06 removed max7301agl and ani package, added max7301atl+ package 1, 2, 5, 9, 15, 17 6 4/06 updated absolute maximum ratings , corrected pin configuration and package outlines 2, 5, 15, 16, 17 7 7/14 removed automotive reference from data sheet 1 8 5/15 updated benefits and features section 1 revision history ? 2015 maxim integrated products, inc. 17 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max7301 4-wire-interfaced, 2.5v to 5.5v, 20-port and 28-port i/o expander for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.

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